A level shift circuit having a high withstand voltage has been disclosed, for example, in U.S. Pat. No. 7,239,181 corresponding to JP-A-2006-148058. As shown in FIG. 12, a level shift circuit 100 disclosed in U.S. Pat. No. 7,239,181 includes transistors Tr1-Trn that are electrically isolated from each other and connected in series between a ground potential and a predetermined potential Vs. The transistor Tr1 located at the ground potential side is set as a first stage transistor, and the transistor Trn located at the predetermined potential Vs side is set as an n-th stage transistor. The gate terminal of the first stage transistor Tr1 is set as an input terminal of the level shift circuit 100. The level shift circuit 100 further includes resistors R1-Rn that are connected in series between the ground potential and the predetermined potential Vs. The resistor R1 located at the ground potential side is set as a first stage resistor, and the resistor Rn located at the predetermined potential Vs side is set as an n-th stage resistor. Diodes D2-Dn are respectively interposed between the gates of the transistors Tr2-Trn and ground potential side terminals of the transistors Tr2-Trn.
The gates of the transistors Tr2-Trn are respectively coupled to nodes between the resistors R1-Rn. An output of the level shift circuit 100 is obtained from a predetermined potential Vs side terminal of the n-th transistor. The transistors Tr1-Trn are formed on a n-conductive type semiconductor layer on a buried insulating layer of a silicon-on-insulator substrate. The semiconductor layer are divided into field regions by isolation trenches extending to the buried insulating layer. The transistors Tr1-Trn are formed in the respective field regions and electrically isolated from each other The isolation trenches are arranged in a multiplexed manner. For example, the transistors Tr1-Trn are laterally diffused metal oxide semiconductors (LDMOS).
Thus, although each of the transistors Tr1-Trn has a normal withstand voltage and is manufactured at low cost by a typical manufacturing process, the level shift circuit 100 as a whole can have a high withstand voltage. However, the level shift circuit 100 has a transistor, a resistor, and a diode at each stage. Therefore, the level shift circuit 100 is increased in size. The level shift circuit 100 may be damaged by a surge that is caused when the predetermined potential Vs swings. The level shift circuit 100 can be protected from the surge by adding a capacitor at each stage. However, the addition of the capacitor results in a further increase in size of the level shift circuit 100.